TRABALHOS PUBLICADOS
2015 |
A Simple Approach for the Design of Asynchronous State Machines Using One-Hot Encoding Proceedings Article Oliveira, Duarte L; Curtinhas, Tiago; Faria, Lester A Resumo | Links | BibTeX | Tags: asynchronous, control cells, finite state machine @inproceedings{Duarte2015controlb,This paper proposes a new approach for the synthesis, by direct mapping, of burst-mode asynchronous finite state machines (BM_AFSM). Considering typical aerospace environments, asynchronous circuits tend to avoid several kinds of problems related to high-complexity circuits designing, what is highly desirable in military systems. They do not present clock skew and minimizes the power consumption, leading to long-life battery-fed systems. They are also more robust to noise, temperature variations and to technology migration, presenting low electromagnetic emission. The great advantage of the synthesis by direct mapping is the simplicity of the methodology, not demanding any knowledge on asynchronous logic concepts, hazard-free circuits and critical race theory. The synthesized BM_AFSMs operate in Ib/Ob mode, which present superior performance when compared to generalized fundamental mode asynchronous circuits. It shows to be faster than those previously proposed in the literature, presenting a good modularity, what is provided by the simple interface with the external world. Starting from a well-known burst-mode (BM) specification, the direct mapping allows implementing large specifications with just little computational effort. The new approach has, as main advantage when compared to other direct mapping methods, the reduction of the memory elements and thus, of the circuit area. For a large set of benchmarks specified in burst mode, it obtained an average reduction of 49% of the memory devices. |
Two-Level Hazard-Free Logic Minimization of Speed-Independent Extended Burst-Mode Controllers Proceedings Article Oliveira, Duarte L; Faria, Lester A Resumo | Links | BibTeX | Tags: asynchronous logic, finite state machine @inproceedings{Duarte2015finiteb,Several algorithms of hazard-free logic minimization were proposed for extended burst-mode asynchronous controllers that operate in the generalized fundamental mode (GFM) and accept the so-called extended burst-mode (XBM) Specification. This class of controller’s shows to be very interesting because the XBM specification allows describing a wide range of circuits, from complex asynchronous interfaces to Moore-type synchronous controllers that operate in the two edges of the clock signal. Another interesting class of asynchronous controllers is the speed-independent (SI) ones. They are more robusts, more modulate and easy to be verified, when counter-parts. Considering and conjugating the advantages provided by both approaches, in this paper we propose an algorithm for hazard-free logic minimization, exact in the number of literals, for SI asynchronous controllers that starts from the XBM specification, being highly suitable for the implementation on high accuracy, robust and complex systems, like the ones actually embedded in military systems and platforms. The proposed algorithm has been successfully applied to a set of known benchmarks showing good and potential results for practical implementation. |
2011 |
A new Memory Element for Synthesis by Direct Mapping of Asynchronous FSMs from XBM Specification Proceedings Article Oliveira, Duarte L; Faria, Lester A; Alles, Noé Resumo | Links | BibTeX | Tags: asynchronous, control cells, finite state machine @inproceedings{Duarte2011controlb,This paper proposes a new memory element (control cell) for synthesis by direct mapping of extended burst- mode asynchronous finite state machines (XBM_AFSM). The great advantage of the synthesis by direct mapping is the achieved simplicity in methodology because it does not demand any knowledge of asynchronous logic concepts. The direct mapping starts from a well known extended burst-mode (XBM) specification and allows implementing large specifications with just little computational effort. The proposed memory element presents a better performance if compared to the existing ones that are used in the synthesis by direct mapping of XBM_AFSM, showing a reduction of 50% in the area, 29% of LUTS and 15% at the latency time. |