TRABALHOS PUBLICADOS

@inproceedings{Duarte2016XBMb,

title = {A Synchronous Wrapper for Asynchronous Pipeline Modules in a Synchronous Design in FPGAs},

author = {Duarte L Oliveira and Kledermon Garcia and Lester A Faria and Higor A Delsoto and Leonardo Romano},

url = {https://www.sige.ita.br/edicoes-anteriores/2016/st/ST_06_1.pdf},

year  = {2016},

date = {2016-01-01},

booktitle = {Simp\'{o}sio de Aplica\c{c}\~{o}es Operacionais em \'{A}reas de Defesa 2016 (SIGE2016)},

abstract = {Taking advantage of both synchronous and asynchronous paradigms, a new style of design, called Globally Synchronous Locally Asynchronous (GSLA), has obtained very interesting results. In this paper, we propose a synchronous wrapper that allows the communication of asynchronous modules with a synchronous environment. The proposed synchronous wrapper comprises a locally asynchronous pipeline module. This asynchronous pipeline style shows to be interesting for FPGA platforms due to the simplicity of its controller. Through a case study, a 5th order FIR filter, it is shown that the proposed wrapper presents a reduction of 4% in the power consumption when compared with a synchronous pipeline design. The synchronous wrapper allows the asynchronous pipeline modules to interact with other synchronous modules up to a frequency of 500MHZ. For the case study, the synchronous wrapper provided an increase of 200% in global clock rate. KeywordsXBM specification, AFSM, logic asynchronous, GSLA.},

keywords = {AFSM, GSLA, logic asynchronous, XBM specification},

pubstate = {published},

tppubtype = {inproceedings}

}