TRABALHOS PUBLICADOS
2016 |
An Asynchronous Implementation of Cryptographic Algorithm using High-Level Automatic Synthesis Proceedings Article Garcia, Kledermon; Oliveira, Duarte L; Faria, Lester A; Delsolto, Higor A; Romano, Leonardo Resumo | Links | BibTeX | Tags: data-path single-rail, logic asynchronous, XBM specification @inproceedings{Kledermon2016logicb,Currently, digital systems that are able to meet major security restrictions are increasingly being demanded, both in the military and in commercial areas. Data security can be achieved by cryptographic algorithms, which are subject to attacks, often using the clock signal to reveal the secret data. To deal with this major problem, the asynchronous paradigm presents interesting features, due to the lack of the clock signal, being an option for the project of digital systems. In this paper, we propose a bundled-data architecture to implement an asynchronous cryptosystem. The cryptographic algorithm was chosen based on its simplicity and is called TEA (Tiny it was Encryption Algorithm). For considered FPGAs (Field Programmable Gate Array) devices as target platforms. Compared to synchronous designs, the asynchronous ones, besides being more robust, presented a reduction in the latency time of up to 15% and in power dissipation of up to 11.9%. Keywordslogic asynchronous, XBM specification, data-path single-rail. |